Changes to OnePass correctness and SampleMonomial Runtime analysis per @atri 022521 suggestions.
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@ -310,7 +310,7 @@ we first state the lemmas that summarize the relevant properties of $\onepass$ a
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\begin{Lemma}\label{lem:one-pass}
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The $\onepass$ function completes in $O(size(\circuit))$ time. $\onepass$ guarantees two post-conditions: First, for each subcircuit $\vari{S}$ of $\circuit$, we have that $\vari{S}.\vari{partial}$ is set to $\abs{\vari{S}}(1,\ldots, 1)$. Second, when $\vari{S}.\type = \circplus$, for each $\vari{input}$ of $\vari{S}$, $\vari{input}.\vari{weight}$ is set to $\frac{\abs{\vari{S}_{\vari{input}}}(1,\ldots, 1)}{\abs{\vari{S}}(1,\ldots, 1)}$. % is correctly computed for each child of $\vari{S}.$
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The $\onepass$ function completes in $O(size(\circuit))$ time. $\onepass$ guarantees two post-conditions: First, for each subcircuit $\vari{S}$ of $\circuit$, we have that $\vari{S}.\vari{partial}$ is set to $\abs{\vari{S}}(1,\ldots, 1)$. Second, when $\vari{S}.\type = \circplus$, \subcircuit.\lwght $= \frac{\abs{\subcircuit_\linput}(1,\ldots, 1)}{\abs{\subcircuit}(1,\ldots, 1)}$ and likewise for \subcircuit.\rwght.% is correctly computed for each child of $\vari{S}.$
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\end{Lemma}
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To prove correctness of~\Cref{alg:mon-sam}, we only use the following fact that follows from the above lemma: for the modified circuit ($\circuit_{\vari{mod}}$), $\circuit_{\vari{mod}}$, $\circuit_{\vari{mod}}.\vari{partial}=\abs{\circuit}(1,\dots,1)$.
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%\AH{I'm wondering if there is a better notation to use here. I myself got confused by my own notation of $\circuit_{\vari{mod}}$. \emph{But}, we need to to be referencing the modified $\circuit$ returned by $\onepass$ in the algorithm, so maybe this is the best we can do?}
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@ -363,8 +363,8 @@ It turns out that for proof of~\Cref{lem:sample}, we need to argue that when $\c
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\begin{align}
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\label{eq:T-weights}
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%&\abs{\circuit_\lchild}(1,\ldots, 1) + \abs{\circuit_\rchild}(1,\ldots, 1); &\textbf{if }\circuit.\type = + \\
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\circuit_\linput.\vari{weight} &\gets \frac{\abs{\circuit_\linput}(1,\ldots, 1)}{\abs{\circuit_\linput}(1,\ldots, 1) + \abs{\circuit_\rinput}(1,\ldots, 1)};\\
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\circuit_\rinput.\vari{weight} &\gets \frac{\abs{\circuit_\rinput}(1,\ldots, 1)}{\abs{\circuit_\linput}(1,\ldots, 1)+ \abs{\circuit_\rinput}(1,\ldots, 1)}
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\circuit.\lwght &\gets \frac{\abs{\circuit_\linput}(1,\ldots, 1)}{\abs{\circuit_\linput}(1,\ldots, 1) + \abs{\circuit_\rinput}(1,\ldots, 1)};\\
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\circuit.\rwght &\gets \frac{\abs{\circuit_\rinput}(1,\ldots, 1)}{\abs{\circuit_\linput}(1,\ldots, 1)+ \abs{\circuit_\rinput}(1,\ldots, 1)}
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\end{align}
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%\begin{align*}
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@ -635,21 +635,22 @@ level 2/.style={sibling distance=0.7cm},
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\subsection{Proof of ~\Cref{lem:one-pass}}\label{sec:proof-one-pass}
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\paragraph{\onepass Correctness}
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We prove the correct computation of \prt, \lwght, \rwght values on \circuit by induction over the topological order of the input circuit \circuit.
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We prove the correct computation of \prt, \lwght, \rwght values on \circuit by induction over the number of iterations in line ~\ref{alg:one-pass-loop} over the topological order \topord of the input circuit \circuit. Note that \topord is the standard definition of a topological ordering over the DAG structure of \circuit.
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For the base case, we have only one gate, which by definition is a source gate and must be either \var or \tnum. In this case, lines ~\ref{alg:one-pass-var} and ~\ref{alg:one-pass-num} correctly compute \circuit.\prt as $1$ and \circuit.\val respectively.
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For the base case, we have only one gate, which by definition is a source gate and must be either \var or \tnum. In this case, as per ~\ref{eq:T-all-ones}, lines ~\ref{alg:one-pass-var} and ~\ref{alg:one-pass-num} correctly compute \circuit.\prt as $1$ and \circuit.\val respectively.
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For the inductive hypothesis, assume that the correctness of \onepass holds for a circuit \circuit with $k > 0$ gates.
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For the inductive hypothesis, assume that \onepass correctly computes \subcircuit.\prt, \subcircuit.\lwght, and \subcircuit.\rwght for all gates \subcircuit in \circuit with $k > 0$ iterations over \topord.
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We now prove for $k + 1$ gates that \onepass correctly computes the \prt, \lwght, and \rwght values for each gate \gate in \circuit. By the hypothesis the first $k$ gates (alternatively \textit{iterations}) have correctly computed values. Note that the $k+ 1$ iteration must be that the last gate in the topological order, and this gate must be the sink gate $\gate_\vari{s}$. It is also the case that $\gate_\vari{s}$ has at most two children. Finally, note that $\gate_\vari{s}$ is an internal node and implying that $\gate_\vari{s}.\type = \circplus$ or $\gate_\vari{s}.\type = \circmult$.
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We now prove for $k + 1$ iterations that \onepass correctly computes the \prt, \lwght, and \rwght values for each gate \gate in \circuit. %By the hypothesis the first $k$ gates (alternatively \textit{iterations}) have correctly computed values.
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Note that the $k+ 1$ iteration must be the last gate in the topological order, and this gate must be the sink gate $\gate_\vari{s}$. It is also the case that $\gate_\vari{s}$ has at most two children. Finally, note that $\gate_\vari{s}$ is an internal node and implying that $\gate_\vari{s}.\type = \circplus$ or $\gate_\vari{s}.\type = \circmult$.
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When $\gate_\vari{s}.\type = \circplus$, then by line ~\ref{alg:one-pass-plus} $\gate_\vari{s}.\prt = \gate_{\vari{s}_\lchild}.\prt + \gate_{\vari{s}_\rchild}.\prt$, a correct computation. Further, lines ~\ref{alg:one-pass-lwght} and ~\ref{alg:one-pass-rwght} compute $\gate_{\vari{s}}.\lwght = \frac{\gate_{\vari{s}_\lchild}.\prt}{\gate_{\vari{s}}.\prt}$ and analogously for $\gate_{\vari{s}}.\rwght$, both of which are correct computations based on the I.H. Note that all values needed for each computation have been correctly computed by the I.H.
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When $\gate_\vari{s}.\type = \circplus$, then by line ~\ref{alg:one-pass-plus} $\gate_\vari{s}.\prt = \gate_{\vari{s}_\lchild}.\prt + \gate_{\vari{s}_\rchild}.\prt$, a correct computation, as per ~\ref{eq:T-all-ones}. Further, lines ~\ref{alg:one-pass-lwght} and ~\ref{alg:one-pass-rwght} compute $\gate_{\vari{s}}.\lwght = \frac{\gate_{\vari{s}_\lchild}.\prt}{\gate_{\vari{s}}.\prt}$ and analogously for $\gate_{\vari{s}}.\rwght$. Note that all values needed for each computation have been correctly computed by the I.H.
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When $\gate_\vari{s}.\type = \circmult$, then line ~\ref{alg:one-pass-mult} computes $\gate_\vari{s}.\prt = \gate_{\vari{s}_\lchild.\prt} \circmult \gate_{\vari{s}_\rchild}.\prt$, which indeed is correct.
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When $\gate_\vari{s}.\type = \circmult$, then line ~\ref{alg:one-pass-mult} computes $\gate_\vari{s}.\prt = \gate_{\vari{s}_\lchild.\prt} \circmult \gate_{\vari{s}_\rchild}.\prt$, which indeed is correct, as per ~\ref{eq:T-all-ones}.
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%We first note that all DAGs have a topological ordering. By definition, for a graph $G = (V, E)$, a topological ordering $\topord(G)$ orders the elements of V in correspondence to the directed edges of $E$, such that for each edge $(u, v)$ the gate $u$ will be ordered before gate $v$, since the edge goes from $u$ to $v$. Since the directed edges of circuit \circuit go from the children to the parent, it is then invariant in $\topord(G)$ that all the children $v_\linput$ and/or $v_\rinput$ appear before their parental internal gate $v \in V$ in $\topord(G)$. Since \onepass follows $\topord(\circuit)$ (~\Cref{alg:one-pass-loop}), it has to be the case that before an internal gate is visited, both of its subcircuits $\subcircuit_\linput$ and $\subcircuit_\rinput$ will have previously been visited, computing \prt, \lwght, and \rwght values in a bottom-up traversal. When the node visited by \onepass is a source node, it is trivial to see in ~\Cref{alg:one-pass-var} and ~\Cref{alg:one-pass-num} that such a child node's \prt value is correctly computed. This implies the correctness of the \prt annotations across all gates in both $\subcircuit_\linput$ and $\subcircuit_\rinput$. Recall that all internal gates are either $\circplus$ or $\circmult$. When an internal gate \subcircuit is visited in \topord(\circuit), if \subcircuit.\type is $\circplus$, \onepass will add the values of the two source nodes $\subcircuit_\linput.\prt + \subcircuit_\rinput.\prt$ to correctly annotate \subcircuit.\prt. Further \subcircuit.\lwght will be computed correctly as $\frac{\subcircuit_\linput.\prt}{\subcircuit.\prt}$ and analogously for \subcircuit.\rwght. If the parent gate \subcircuit visited is a $\circmult$, then \onepass will correctly annotate \subcircuit.\prt as $\subcircuit_\linput.\prt \times \subcircuit_\rinput.\prt$. As gates further in the order are subsequently visited, note that it is the case that all previous gates visited will always contain the correct \prt values and it follows that all subsequent gates visited in \topord(\circuit) will correctly compute their respective \prt values. Since \lwght and \rwght are computed dependent only on \prt values, it follows that all \lwght and \rwght values will then be computed correctly.
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\paragraph{\onepass Runtime}
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It is known that $\topord(G)$ is computable in linear time. Next, each of the \numvar~ iterations of the loop in ~\Cref{alg:one-pass-loop} take $O(1)$ time, thus yielding a runtime of $O\left(\size(\circuit)\right)$.
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It is known that $\topord(G)$ is computable in linear time. Next, each of the $\numvar$ iterations of the loop in ~\Cref{alg:one-pass-loop} take $O(1)$ time, thus yielding a runtime of $O\left(\size(\circuit)\right)$.
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}
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@ -657,7 +658,8 @@ It is known that $\topord(G)$ is computable in linear time. Next, each of the \
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\revision{
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While we would like to take advantage of the space efficiency gained in using a circuit \circuit instead an expression tree \etree, we do not know that such a method exists when computing a sample of the input polynomial representation.
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The efficiency gains of circuits over trees is found in the capability of circuits to only require space for each \emph{distinct} term in the compressed representation. This saves space in such polynomials containing non-distinct terms multiplied or added to each other, e.g., $x^4$. However, to avoid biased sampling, it is imperative to sample from both inputs of a multiplication gate, independently. When we perform separate, independent sampling of both inputs, the result is the same as performing the sampling computation over the space inefficient expression tree. (Note that an expression tree \etree is a special case of a circuit with the restriction of one output per node.) However, this doesn't harm us, since as we show, that the bounded run time is not dependent on the size of the equivalent expression tree of the input circuit \circuit, but rather on the expression tree's depth, which is the same as the depth of \circuit.
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The efficiency gains of circuits over trees is found in the capability of circuits to only require space for each \emph{distinct} term in the compressed representation. This saves space in such polynomials containing non-distinct terms multiplied or added to each other, e.g., $x^4$. However, to avoid biased sampling, it is imperative to sample from both inputs of a multiplication gate, independently, which is indeed the approach of \sampmon.
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%When we perform separate, independent sampling of both inputs, the result is the same as performing the sampling computation over the space inefficient expression tree. (Note that an expression tree \etree is a special case of a circuit with the restriction of one output per node.) However, this doesn't harm us, since as we show, that the bounded run time is not dependent on the size of the equivalent expression tree of the input circuit \circuit, but rather on the expression tree's depth, which is the same as the depth of \circuit.
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}
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@ -708,22 +710,41 @@ Let \cost be a function that models an upper bound on the number of gates that c
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\cost(\circuit) =
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\begin{cases}
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1 + \cost(\circuit_\linput) + \cost(\circuit_\rinput) & \textbf{if } \text{\circuit.\type = }\circmult\\
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1 + max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right) & \textbf{if } \text{\circuit.\type = \circplus}\\
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1 + \max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right) & \textbf{if } \text{\circuit.\type = \circplus}\\
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1 & \textbf{otherwise}
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\end{cases}
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\end{equation*}
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First note that \cost is indeed a correct upper bound. When \sampmon visits a gate such that \circuit.\type $ =\circmult$, line ~\ref{alg:sample-times-for-loop} visits each input of \circuit. For the case when \circuit.\type $= \circplus$, line ~\ref{alg:sample-plus-bsamp} visits exactly one of the input gates. Finally, it is trivial to see that when \circuit.\type $\in \{\var, \tnum\}$, i.e., a source gate, that only one gate is visited.
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First note that the runtime of \sampmon is $O\left(\cost(\circuit)\right)$. When \sampmon visits a gate such that \circuit.\type $ =\circmult$, line ~\ref{alg:sample-times-for-loop} visits each input of \circuit. For the case when \circuit.\type $= \circplus$, line ~\ref{alg:sample-plus-bsamp} visits exactly one of the input gates. Finally, it is trivial to see that when \circuit.\type $\in \{\var, \tnum\}$, i.e., a source gate, that only one gate is visited.
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We prove an upper bound of $O\left(k \cdot \depth(\circuit)\right) \geq \cost(\circuit)$ on the number of gates traversed in \sampmon using induction over $\depth(\circuit) = d$. %of \circuit, where $\degree(\circuit) = k$, and $\size(\circuit) = \ell$.
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For the base case $\depth(\circuit) = 0$, $\cost(\circuit) = 1$, and it is trivial to see that $\degree(\circuit) = k = 1$, $\depth(\circuit) = 1$, which imples that $O(k \cdot d) \geq \cost(\circuit)$, and the bound trivially holds.
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We prove $\degree(\circuit) \cdot \depth(\circuit) \geq \cost(\circuit)$ for the number of gates traversed in \sampmon using induction over $\depth(\circuit)$. To simplify the math, we consider $\depth(\circuit)$ to be $1$-based instead of $0$-based, e.g., $\size(\circuit) = 1$ has $\depth(\circuit) = 1$. This will not change the final asymptotic analysis, since $O(k \cdot (d + 1))$ simplifies to $O(k \cdot d)$.%of \circuit, where $\degree(\circuit) = k$, and $\size(\circuit) = \ell$.
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For the inductive hypothesis, we assume the bound holds for a circuit of depth $d \leq \ell \geq 0$.
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Now consider the case when \sampmon has an arbitrary circuit \circuit input with $d + 1 \leq \ell + 1$. By the hypothesis, we know all inputs of the sink gate \circuit uphold the bound. It is true then that $\depth(\circuit_\rinput) \leq d \geq \depth(\circuit_\linput)$ where at least one of the inequalities is a strict equality. Fix $\degree(\circuit_\linput) = k'$ and $\degree(\circuit_\rinput) = k''$. If \circuit.\type $= \circplus$, then $\degree(\circuit) = k = max(k', k'')$. Otherwise \circuit.\type = $\circmult$ and $\degree(\circuit) = k' + k''$.
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For the base case $\depth(\circuit) = 1$, $\cost(\circuit) = 1$, and it is trivial to see that $\degree(\circuit) = 1$, $\depth(\circuit) = 1$, and the inequality $\degree(\circuit) \cdot \depth(\circuit) \geq \cost(\circuit)$ holds.
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If \circuit.\type $= \circmult$, we have already seen that \sampmon visits all inputs of \circuit. Then \sampmon visits at most $\cost(\circuit) = 1 + \cost(\circuit_\linput) + \cost(\circuit_\rinput)$ gates. Since we have that $O\left(k' \cdot (d - 1)\right) \geq \cost(\circuit_\linput)$ gates were traversed in $\circuit_\linput$ and $O\left(k'' \cdot (d - 1)\right) \geq \cost(\circuit_\rinput)$ gates in $\circuit_\rinput$, then we have for \circuit that $O\left((k' + k'')\cdot(d - 1)\right) + 1 = O(\left(k \cdot(d - 1)\right) + 1$ gates have been traversed. It is trivial to see that the sink gate \circuit has $\leq k$ gates, thus holding the $O(k\cdot d)\geq\cost(\circuit)$ bound.
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For the inductive hypothesis, we assume the bound holds for a circuit where $\depth(\circuit) \leq \ell$ for $\ell \geq 0$.
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Now consider the case when \sampmon has an arbitrary circuit \circuit input with $\depth(\circuit) \leq \ell + 1$. By the hypothesis, we know all inputs of the sink gate \circuit uphold the bound. It is true then that $\depth(\circuit_\linput) \leq \depth(\circuit)$ and $\depth(\circuit_\rinput) \leq \depth(\circuit)$ where at least one of the inequalities is a strict equality.
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%Fix $\degree(\circuit_\linput) = k'$ and $\degree(\circuit_\rinput) = k''$.
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If \circuit.\type $= \circplus$, then $\degree(\circuit) = \max\left(\degree(\circuit_\linput), \degree(\circuit_\rinput)\right)$. Otherwise \circuit.\type = $\circmult$ and $\degree(\circuit) = \degree(\circuit_\linput) + \degree(\circuit_\rinput)$. For both cases it is true that $\depth(\circuit) = \max(\depth(\circuit_\linput), \depth(\circuit_\rinput)) + 1$, and there exist the inequalities $\degree(\circuit_\linput) \cdot \depth(\circuit_\linput) \geq \cost(\circuit_\linput)$, and $\degree(\circuit_\rinput) \cdot \depth(\circuit_\rinput) \geq \cost(\circuit_\rinput)$.
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If \circuit.\type $= \circplus$, then \sampmon samples exactly one of its inputs. Then it follows that $\cost(\circuit) = 1 + max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right)$. Suppose that $max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right) = \circuit_\linput$, then it is the case that $k \geq k'$, with a bound $O(k' \cdot d - 1)\geq \cost(\circuit_\linput)$ on $\circuit_\linput$, and this implies a bound of $O\left(k \cdot d\right)\geq \cost(\circuit)$ on \circuit since sink gate \circuit has $\leq k$ nodes.
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If \circuit.\type $= \circmult$, then,
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%$\degree(\circuit) = \degree(\circuit_\linput) + \degree(\circuit_\linput), \depth(\circuit) = \max(\depth(\circuit_\linput), \depth(\circuit_\rinput))$, and there exist inequalities $\degree(\circuit_\linput) \cdot \depth(\circuit_\linput) \geq \cost(\circuit_\linput)$ and $\degree(\circuit_\rinput) \cdot \depth(\circuit_\rinput) \geq \cost(\circuit_\rinput)$. Then
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substituing values, we have that
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\begin{align*}
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&\left(\degree(\circuit_\linput) + \degree(\circuit_\linput)\right) \cdot \left(\max(\depth(\circuit_\linput), \depth(\circuit_\rinput)) + 1\right)\\
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&\qquad\geq \degree(\circuit_\linput)\cdot \depth(\circuit_\linput) + \degree(\circuit_\rinput) \cdot \depth(\circuit_\rinput) + 1 \\
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&\qquad\qquad\geq 1 + \cost(\circuit_\linput) + \cost(\circuit_\rinput).
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\end{align*}
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The left inequality holds since it is always the case that $\degree(\circuit_i) \cdot (\depth(\circuit_i) + 1) > \degree(\circuit_i) \cdot \depth(\circuit_i)$ for $\degree(\circuit_i), \depth(\circuit_i) > 0$ . The second inequality holds by I.H. It follows that $\degree(\circuit) \cdot \depth(\circuit) \geq \cost(\circuit)$.
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% we have already seen that \sampmon visits all inputs of \circuit. Then \sampmon visits at most $\cost(\circuit) = 1 + \cost(\circuit_\linput) + \cost(\circuit_\rinput)$ gates. Since we have that $\degree(\circuit_\linput) \cdot \depth(\circuit_\linput) \geq \cost(\circuit_\linput)$ for $\circuit_\linput$ and $\degree(\circuit_\rinput) \cdot \depth(\circuit_\rinput) \geq \cost(\circuit_\rinput)$ for $\circuit_\rinput$, then we have that $\degree(\circuit_\linput) \cdot \depth(\circuit_\linput) + \degree(\circuit_\rinput) \cdot \depth(\circuit_\rinput)$ gates have been traversed. It is trivial to see that the sink gate \circuit has $\leq k$ gates, thus holding the $O(k\cdot d)\geq\cost(\circuit)$ bound.
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If \circuit.\type $= \circplus$, then substituting values yields
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\begin{align*}
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&\max(\degree(\circuit_\linput), \degree(\circuit_\rinput)) \cdot \left(\max(\depth(\circuit_\linput), \depth(\circuit_\rinput)) + 1\right)\\
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&\qquad \geq \left(\degree(\circuit_\linput) \cdot \depth(\circuit_\rinput)\right) + \left(\degree(\circuit_\rinput) \cdot \depth(\circuit_\linput)\right) + 1\\
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&\qquad\qquad \geq 1 + \max(\cost(\circuit_\linput), \cost(\circuit_\rinput))
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\end{align*}
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The above inequalities hold for the same reasons as for the case $\circuit.\type = \circmult$. Thus, $\degree(\circuit)\cdot\depth(\circuit) \geq \cost(\circuit)$.
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%\sampmon samples exactly one of its inputs. Then it follows that $\cost(\circuit) = 1 + max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right)$. Suppose that $max\left(\cost(\circuit_\linput), \cost(\circuit_\rinput)\right) = \circuit_\linput$, then it is the case that $k \geq k'$, with a bound $O(k' \cdot d - 1)\geq \cost(\circuit_\linput)$ on $\circuit_\linput$, and this implies a bound of $O\left(k \cdot d\right)\geq \cost(\circuit)$ on \circuit since sink gate \circuit has $\leq k$ nodes.
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}
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%\revision{
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%\begin{Definition}[Equivalent Expression Tree]\label{def:eet}
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@ -751,7 +772,7 @@ If \circuit.\type $= \circplus$, then \sampmon samples exactly one of its inputs
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%}
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%
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It is easy to check that except for~\Cref{alg:sample-times-union}, all other lines take $O(1)$ time. Thus, overall all lines except for~\Cref{alg:sample-times-union} take $O(k\cdot depth(\circuit))$ time. Now consider all executions of~\Cref{alg:sample-times-union} together. We note that at each level we will be adding a given set of variables to some set at most once: since the sum of the sizes of the sets at a given level is at most $k$, each level involves $O(k\log{k})$ time. Thus, overall all executions of~\Cref{alg:sample-times-union} takes $O(k\log{k}\cdot \depth(\circuit))$ time, as desired.
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It is easy to check that except for~\Cref{alg:sample-times-union}, all other lines take $O(1)$ time. Thus, overall all lines except for~\Cref{alg:sample-times-union} take $O(k\cdot \depth(\circuit))$ time. Now consider all executions of~\Cref{alg:sample-times-union} together. We note that at each level we will be adding a given set of variables to some set at most once: since the sum of the sizes of the sets at a given level is at most $k$, each level involves $O(k\log{k})$ time. Thus, overall all executions of~\Cref{alg:sample-times-union} takes $O(k\log{k}\cdot \depth(\circuit))$ time, as desired.
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\subsection{Experimental Results}\label{app:subsec:experiment}
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@ -107,7 +107,7 @@ For illustrative purposes consider the polynomial $\poly(\vct{X}) = 2X^2 + 3XY -
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We represent query polynomials via {\em arithmetic circuits}~\cite{arith-complexity}, a standard way to represent polynomials over fields (particularly in the field of algebraic complexity) that we use for polynomials over $\mathbb N$ in the obvious way.
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\begin{Definition}[Circuit]\label{def:circuit}
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A circuit $\circuit$ is a Directed Acyclic Graph (DAG) whose source nodes (in degree of $0$) consist of elements in either $\reals$ or $\vct{X}$. The internal and sink nodes of $\circuit$ have binary input and are either sum ($\circplus$) or product ($\circmult$) gates.
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A circuit $\circuit$ is a Directed Acyclic Graph (DAG) whose source nodes (in degree of $0$) consist of elements in either $\reals$ or $\vct{X}$. The internal nodes and sink node of $\circuit$ have binary input and are either sum ($\circplus$) or product ($\circmult$) gates.
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$\circuit$ additionally has the following members: \type, \val, \vari{partial}, \vari{input}, and \vari{Lweight}, \vari{Rweight}, where \type is the type of value stored in the node $\circuit$ (i.e. one of $\{\circplus, \circmult, \var, \tnum\}$, \val is the value stored (a constant or variable), and \vari{input} is the list of \circuit 's inputs where $\circuit_\linput$ is the left input and $\circuit_\rinput$ the right input. When the underlying DAG is a tree (with edges pointing towards the root), we will refer to the structure as an expression tree \etree. Note that in such a case, the root of \etree is analogous to the sink of the \circuit.
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\end{Definition}
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